GNU Octave  4.4.1
A high-level interpreted language, primarily intended for numerical computations, mostly compatible with Matlab
lo-lapack-proto.h File Reference
#include "octave-config.h"
#include "f77-fcn.h"
#include "oct-cmplx.h"
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Typedefs

typedef F77_INT(* complex_selector) (const F77_DBLE_CMPLX &)
 
typedef F77_INT(* double_selector) (const F77_DBLE &, const F77_DBLE &)
 
typedef F77_INT(* float_complex_selector) (const F77_CMPLX &)
 
typedef F77_INT(* float_selector) (const F77_REAL &, const F77_REAL &)
 

Functions

F77_RET_T F77_FUNC (dgbcon, DGBCON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zgbcon, ZGBCON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dgbtrf, DGBTRF)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T F77_FUNC (zgbtrf, ZGBTRF)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_INT &F77_RET_T F77_FUNC (dgbtrs, DGBTRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zgbtrs, ZGBTRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cgebal, CGEBAL)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dgebal, DGEBAL)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (sgebal, SGEBAL)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zgebal, ZGEBAL)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cgebak, CGEBAK)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dgebak, DGEBAK)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (sgebak, SGEBAK)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zgebak, ZGEBAK)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cgecon, CGECON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dgecon, DGECON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (sgecon, SGECON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zgecon, ZGECON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cgehrd, CGEHRD)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T F77_FUNC (dgehrd, DGEHRD)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T F77_FUNC (sgehrd, SGEHRD)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T F77_FUNC (zgehrd, ZGEHRD)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T F77_FUNC (cgeqp3, CGEQP3)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T F77_FUNC (dgeqp3, DGEQP3)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T F77_FUNC (sgeqp3, SGEQP3)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T F77_FUNC (zgeqp3, ZGEQP3)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T F77_FUNC (cgeqrf, CGEQRF)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T F77_FUNC (dgeqrf, DGEQRF)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T F77_FUNC (sgeqrf, SGEQRF)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T F77_FUNC (zgeqrf, ZGEQRF)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T F77_FUNC (cgesdd, CGESDD)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dgesdd, DGESDD)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (sgesdd, SGESDD)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zgesdd, ZGESDD)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cgesvd, CGESVD)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dgesvd, DGESVD)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (sgesvd, SGESVD)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zgesvd, ZGESVD)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cgeesx, CGEESX)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dgeesx, DGEESX)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (sgeesx, SGEESX)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zgeesx, ZGEESX)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cgeevx, CGEEVX)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dgeevx, DGEEVX)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (sgeevx, SGEEVX)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zgeevx, ZGEEVX)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cgelsd, CGELSD)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T F77_FUNC (dgelsd, DGELSD)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T F77_FUNC (sgelsd, SGELSD)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T F77_FUNC (zgelsd, ZGELSD)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT &F77_RET_T F77_FUNC (cgelsy, CGELSY)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T F77_FUNC (dgelsy, DGELSY)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT &F77_RET_T F77_FUNC (sgelsy, SGELSY)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT &F77_RET_T F77_FUNC (zgelsy, ZGELSY)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T F77_FUNC (cgetrf, CGETRF)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT &F77_RET_T F77_FUNC (dgetrf, DGETRF)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T F77_FUNC (sgetrf, SGETRF)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T F77_FUNC (zgetrf, ZGETRF)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_INT &F77_RET_T F77_FUNC (cgetri, CGETRI)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_INT &F77_RET_T F77_CMPLX const F77_INT const F77_INT F77_CMPLX const F77_INT F77_INT &F77_RET_T F77_FUNC (dgetri, DGETRI)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_INT &F77_RET_T F77_CMPLX const F77_INT const F77_INT F77_CMPLX const F77_INT F77_INT &F77_RET_T F77_DBLE const F77_INT const F77_INT F77_DBLE const F77_INT F77_INT &F77_RET_T F77_FUNC (sgetri, SGETRI)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_INT &F77_RET_T F77_CMPLX const F77_INT const F77_INT F77_CMPLX const F77_INT F77_INT &F77_RET_T F77_DBLE const F77_INT const F77_INT F77_DBLE const F77_INT F77_INT &F77_RET_T F77_REAL const F77_INT const F77_INT F77_REAL const F77_INT F77_INT &F77_RET_T F77_FUNC (zgetri, ZGETRI)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT &F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_INT &F77_RET_T F77_CMPLX const F77_INT const F77_INT F77_CMPLX const F77_INT F77_INT &F77_RET_T F77_DBLE const F77_INT const F77_INT F77_DBLE const F77_INT F77_INT &F77_RET_T F77_REAL const F77_INT const F77_INT F77_REAL const F77_INT F77_INT &F77_RET_T F77_DBLE_CMPLX const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T F77_FUNC (cgetrs, CGETRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dgetrs, DGETRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (sgetrs, SGETRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zgetrs, ZGETRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cggbal, CGGBAL)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dggbal, DGGBAL)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (sggbal, SGGBAL)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zggbal, ZGGBAL)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dggbak, DGGBAK)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (sggbak, SGGBAK)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zggbak, ZGGBAK)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cggev, CGGEV)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dggev, DGGEV)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (sggev, SGGEV)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zggev, ZGGEV)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dgghrd, DGGHRD)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zgghrd, ZGGHRD)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dgtsv, DGTSV)(const F77_INT &
 
F77_RET_T const F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T F77_FUNC (zgtsv, ZGTSV)(const F77_INT &
 
F77_RET_T const F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T F77_FUNC (dgttrf, DGTTRF)(const F77_INT &
 
F77_RET_T const F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T F77_DBLE F77_DBLE F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T F77_FUNC (zgttrf, ZGTTRF)(const F77_INT &
 
F77_RET_T const F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T F77_DBLE F77_DBLE F77_DBLE F77_DBLE F77_INT F77_INT &F77_RET_T F77_DBLE_CMPLX F77_DBLE_CMPLX F77_DBLE_CMPLX F77_DBLE_CMPLX F77_INT F77_INT &F77_RET_T F77_FUNC (dgttrs, DGTTRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zgttrs, ZGTTRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cheev, CHEEV)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zheev, ZHEEV)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (chegv, CHEGV)(const F77_INT &
 
F77_RET_T F77_FUNC (zhegv, ZHEGV)(const F77_INT &
 
F77_RET_T F77_FUNC (cherk, CHERK)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zherk, ZHERK)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dhgeqz, DHGEQZ)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zhgeqz, ZHGEQZ)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (xilaenv, XILAENV)(const F77_INT &
 
F77_RET_T F77_FUNC (dlag2, DLAG2)(const F77_DBLE *A
 
F77_RET_T F77_FUNC (xdlamch, XDLAMCH)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (xclange, XCLANGE)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (xdlange, XDLANGE)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (xslange, XSLANGE)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (xzlange, XZLANGE)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (clartg, CLARTG)(const F77_CMPLX *
 
F77_RET_T const F77_CMPLX F77_REAL F77_CMPLX F77_CMPLX *F77_RET_T F77_FUNC (dlartg, DLARTG)(const F77_DBLE &
 
F77_RET_T const F77_CMPLX F77_REAL F77_CMPLX F77_CMPLX *F77_RET_T const F77_DBLE F77_DBLE F77_DBLE F77_DBLE &F77_RET_T F77_FUNC (slartg, SLARTG)(const F77_REAL &
 
F77_RET_T const F77_CMPLX F77_REAL F77_CMPLX F77_CMPLX *F77_RET_T const F77_DBLE F77_DBLE F77_DBLE F77_DBLE &F77_RET_T const F77_REAL F77_REAL F77_REAL F77_REAL &F77_RET_T F77_FUNC (zlartg, ZLARTG)(const F77_DBLE_CMPLX *
 
F77_RET_T const F77_CMPLX F77_REAL F77_CMPLX F77_CMPLX *F77_RET_T const F77_DBLE F77_DBLE F77_DBLE F77_DBLE &F77_RET_T const F77_REAL F77_REAL F77_REAL F77_REAL &F77_RET_T const F77_DBLE_CMPLX F77_DBLE F77_DBLE_CMPLX F77_DBLE_CMPLX *F77_RET_T F77_FUNC (dorghr, DORGHR)(const F77_INT &
 
F77_RET_T const F77_CMPLX F77_REAL F77_CMPLX F77_CMPLX *F77_RET_T const F77_DBLE F77_DBLE F77_DBLE F77_DBLE &F77_RET_T const F77_REAL F77_REAL F77_REAL F77_REAL &F77_RET_T const F77_DBLE_CMPLX F77_DBLE F77_DBLE_CMPLX F77_DBLE_CMPLX *F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T F77_FUNC (sorghr, SORGHR)(const F77_INT &
 
F77_RET_T const F77_CMPLX F77_REAL F77_CMPLX F77_CMPLX *F77_RET_T const F77_DBLE F77_DBLE F77_DBLE F77_DBLE &F77_RET_T const F77_REAL F77_REAL F77_REAL F77_REAL &F77_RET_T const F77_DBLE_CMPLX F77_DBLE F77_DBLE_CMPLX F77_DBLE_CMPLX *F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T F77_FUNC (dorgqr, DORGQR)(const F77_INT &
 
F77_RET_T const F77_CMPLX F77_REAL F77_CMPLX F77_CMPLX *F77_RET_T const F77_DBLE F77_DBLE F77_DBLE F77_DBLE &F77_RET_T const F77_REAL F77_REAL F77_REAL F77_REAL &F77_RET_T const F77_DBLE_CMPLX F77_DBLE F77_DBLE_CMPLX F77_DBLE_CMPLX *F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T F77_FUNC (sorgqr, SORGQR)(const F77_INT &
 
F77_RET_T const F77_CMPLX F77_REAL F77_CMPLX F77_CMPLX *F77_RET_T const F77_DBLE F77_DBLE F77_DBLE F77_DBLE &F77_RET_T const F77_REAL F77_REAL F77_REAL F77_REAL &F77_RET_T const F77_DBLE_CMPLX F77_DBLE F77_DBLE_CMPLX F77_DBLE_CMPLX *F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT &F77_RET_T F77_FUNC (dpbcon, DPBCON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zpbcon, ZPBCON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dpbtrf, DPBTRF)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zpbtrf, ZPBTRF)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dpbtrs, DPBTRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zpbtrs, ZPBTRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cpocon, CPOCON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dpocon, DPOCON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (spocon, SPOCON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zpocon, ZPOCON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cpotrf, CPOTRF)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dpotrf, DPOTRF)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (spotrf, SPOTRF)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zpotrf, ZPOTRF)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cpotri, CPOTRI)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dpotri, DPOTRI)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (spotri, SPOTRI)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zpotri, ZPOTRI)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (spotrs, SPOTRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cpotrs, CPOTRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dpotrs, DPOTRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zpotrs, ZPOTRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dptsv, DPTSV)(const F77_INT &
 
F77_RET_T const F77_INT F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T F77_FUNC (zptsv, ZPTSV)(const F77_INT &
 
F77_RET_T const F77_INT F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T F77_FUNC (zrsf2csf, ZRSF2CSF)(const F77_INT &
 
F77_RET_T const F77_INT F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T F77_DBLE_CMPLX F77_DBLE_CMPLX F77_DBLE F77_DBLE *F77_RET_T F77_FUNC (crsf2csf, CRSF2CSF)(const F77_INT &
 
F77_RET_T const F77_INT F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT &F77_RET_T const F77_INT F77_DBLE F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T F77_DBLE_CMPLX F77_DBLE_CMPLX F77_DBLE F77_DBLE *F77_RET_T F77_CMPLX F77_CMPLX F77_REAL F77_REAL *F77_RET_T F77_FUNC (dsyev, DSYEV)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (ssyev, SSYEV)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dsygv, DSYGV)(const F77_INT &
 
F77_RET_T F77_FUNC (ssygv, SSYGV)(const F77_INT &
 
F77_RET_T F77_FUNC (csyrk, CSYRK)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dsyrk, DSYRK)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (ssyrk, SSYRK)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (zsyrk, ZSYRK)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dtgevc, DTGEVC)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (ztgevc, ZTGEVC)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dtgsen, DTGSEN)(const F77_INT &IJOB
 
F77_RET_T F77_FUNC (ctrcon, CTRCON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dtrcon, DTRCON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (strcon, STRCON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (ztrcon, ZTRCON)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (ctrsen, CTRSEN)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_INT F77_REAL F77_REAL F77_CMPLX const F77_INT F77_INT &F77_RET_T F77_FUNC (dtrsen, DTRSEN)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_INT F77_REAL F77_REAL F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT const F77_INT F77_INT &F77_RET_T F77_FUNC (strsen, STRSEN)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_INT F77_REAL F77_REAL F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL F77_REAL F77_REAL const F77_INT F77_INT const F77_INT F77_INT &F77_RET_T F77_FUNC (ztrsen, ZTRSEN)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_INT F77_REAL F77_REAL F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL F77_REAL F77_REAL const F77_INT F77_INT const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_INT F77_DBLE F77_DBLE F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T F77_FUNC (ctrsyl, CTRSYL)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dtrsyl, DTRSYL)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (strsyl, STRSYL)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (ztrsyl, ZTRSYL)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (ctrtri, CTRTRI)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dtrtri, DTRTRI)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (strtri, STRTRI)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (ztrtri, ZTRTRI)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (ctrtrs, CTRTRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (dtrtrs, DTRTRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (strtrs, STRTRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (ztrtrs, ZTRTRS)(F77_CONST_CHAR_ARG_DECL
 
F77_RET_T F77_FUNC (cunghr, CUNGHR)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T F77_FUNC (zunghr, ZUNGHR)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T F77_FUNC (cungqr, CUNGQR)(const F77_INT &
 
F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT &F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT &F77_RET_T F77_FUNC (zungqr, ZUNGQR)(const F77_INT &
 
 F77_RET_T (F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, const F77_INT &, const F77_INT &, const F77_INT &, F77_INT &, F77_INT &, F77_DBLE *, const F77_INT &, F77_DBLE *, const F77_INT &, F77_DBLE *, F77_DBLE *, F77_DBLE *, const F77_INT &, F77_DBLE *, const F77_INT &, F77_DBLE *, const F77_INT &, F77_DBLE *, F77_INT *, F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL)
 
 F77_RET_T (F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, const F77_INT &, const F77_INT &, const F77_INT &, F77_INT &, F77_INT &, F77_REAL *, const F77_INT &, F77_REAL *, const F77_INT &, F77_REAL *, F77_REAL *, F77_REAL *, const F77_INT &, F77_REAL *, const F77_INT &, F77_REAL *, const F77_INT &, F77_REAL *, F77_INT *, F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL)
 
 F77_RET_T (F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, const F77_INT &, const F77_INT &, const F77_INT &, F77_INT &, F77_INT &, F77_DBLE_CMPLX *, const F77_INT &, F77_DBLE_CMPLX *, const F77_INT &, F77_DBLE *, F77_DBLE *, F77_DBLE_CMPLX *, const F77_INT &, F77_DBLE_CMPLX *, const F77_INT &, F77_DBLE_CMPLX *, const F77_INT &, F77_DBLE_CMPLX *, F77_DBLE *, F77_INT *, F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL)
 
 F77_RET_T (F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, const F77_INT &, const F77_INT &, const F77_INT &, F77_INT &, F77_INT &, F77_CMPLX *, const F77_INT &, F77_CMPLX *, const F77_INT &, F77_REAL *, F77_REAL *, F77_CMPLX *, const F77_INT &, F77_CMPLX *, const F77_INT &, F77_CMPLX *, const F77_INT &, F77_CMPLX *, F77_REAL *, F77_INT *, F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL)
 
 F77_RET_T (F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, const F77_INT &, const F77_INT &, const F77_INT &, F77_INT &, F77_INT &, F77_DBLE *, const F77_INT &, F77_DBLE *, const F77_INT &, F77_DBLE *, F77_DBLE *, F77_DBLE *, const F77_INT &, F77_DBLE *, const F77_INT &, F77_DBLE *, const F77_INT &, F77_DBLE *, const F77_INT &, F77_INT *, F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL)
 
 F77_RET_T (F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, const F77_INT &, const F77_INT &, const F77_INT &, F77_INT &, F77_INT &, F77_REAL *, const F77_INT &, F77_REAL *, const F77_INT &, F77_REAL *, F77_REAL *, F77_REAL *, const F77_INT &, F77_REAL *, const F77_INT &, F77_REAL *, const F77_INT &, F77_REAL *, const F77_INT &, F77_INT *, F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL)
 
 F77_RET_T (F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, const F77_INT &, const F77_INT &, const F77_INT &, F77_INT &, F77_INT &, F77_DBLE_CMPLX *, const F77_INT &, F77_DBLE_CMPLX *, const F77_INT &, F77_DBLE *, F77_DBLE *, F77_DBLE_CMPLX *, const F77_INT &, F77_DBLE_CMPLX *, const F77_INT &, F77_DBLE_CMPLX *, const F77_INT &, F77_DBLE_CMPLX *, const F77_INT &, F77_DBLE *, F77_INT *, F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL)
 
 F77_RET_T (F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, F77_CONST_CHAR_ARG_DECL, const F77_INT &, const F77_INT &, const F77_INT &, F77_INT &, F77_INT &, F77_CMPLX *, const F77_INT &, F77_CMPLX *, const F77_INT &, F77_REAL *, F77_REAL *, F77_CMPLX *, const F77_INT &, F77_CMPLX *, const F77_INT &, F77_CMPLX *, const F77_INT &, F77_CMPLX *, const F77_INT &, F77_REAL *, F77_INT *, F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL)
 

Variables

F77_RET_T const F77_INT F77_CMPLXA
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLXALPHA
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLEALPHAI
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLEALPHAR
 
F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLXB
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_DBLEBETA
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX F77_DBLE_CMPLXCQ
 
F77_RET_T F77_INT const F77_INT const F77_DBLE_CMPLX const F77_INT const F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT const F77_INT F77_INT F77_DBLE_CMPLXCWORK
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLXCZ
 
F77_RET_T const F77_LOGICAL const F77_LOGICAL const F77_LOGICAL const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLE F77_DBLEDIF
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE const F77_INT const F77_INT const F77_DBLE F77_DBLE F77_DBLE F77_INT F77_INTF77_CHAR_ARG_LEN_DECL
 
F77_RET_T F77_CONST_CHAR_ARG_DECL
 
F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_INTIHI
 
F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INTILO
 
F77_RET_T const F77_LOGICAL const F77_LOGICAL const F77_LOGICAL const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT const F77_INT F77_INTINFO
 
F77_RET_T const F77_LOGICAL const F77_LOGICAL const F77_LOGICAL const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INTIWORK
 
F77_RET_T const F77_INT F77_CMPLX const F77_INTLDA
 
F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INTLDB
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INTLDQ
 
F77_RET_T const F77_INT const F77_INT const F77_INT const F77_DBLE const F77_DBLE F77_INT F77_DBLE const F77_INTLDV
 
F77_RET_T F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INTLDVL
 
F77_RET_T F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INTLDVR
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INTLDZ
 
F77_RET_T const F77_LOGICAL const F77_LOGICAL const F77_LOGICAL const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT const F77_INTLIWORK
 
F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT F77_REALLSCALE
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INTLWORK
 
F77_RET_T const F77_INT const F77_INT const F77_INT const F77_DBLE const F77_DBLE F77_INTM
 
F77_RET_T F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT const F77_INTMM
 
F77_RET_T const F77_INTN
 
F77_RET_T const F77_LOGICAL const F77_LOGICAL const F77_LOGICAL const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLEPL
 
F77_RET_T const F77_LOGICAL const F77_LOGICAL const F77_LOGICAL const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_DBLEPR
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLEQ
 
F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT F77_REAL F77_REALRSCALE
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLERWORK
 
F77_RET_T const F77_INT const F77_DBLE const F77_INT const F77_DBLESAFMIN
 
F77_RET_T const F77_INT const F77_DBLE const F77_INT const F77_DBLE F77_DBLESCALE1
 
F77_RET_T const F77_INT const F77_DBLE const F77_INT const F77_DBLE F77_DBLE F77_DBLESCALE2
 
F77_RET_T F77_INTSELECT
 
F77_RET_T const F77_INT const F77_INT const F77_INT const F77_DBLE const F77_DBLE F77_INT F77_DBLEV
 
F77_RET_T F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLEVL
 
F77_RET_T F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLEVR
 
F77_RET_T const F77_LOGICALWANTQ
 
F77_RET_T const F77_LOGICAL const F77_LOGICALWANTZ
 
F77_RET_T const F77_INT const F77_DBLE const F77_INT const F77_DBLE F77_DBLE F77_DBLE F77_DBLE F77_DBLE F77_DBLEWI
 
F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT F77_REAL F77_REAL F77_REALWORK
 
F77_RET_T const F77_INT const F77_DBLE const F77_INT const F77_DBLE F77_DBLE F77_DBLE F77_DBLEWR1
 
F77_RET_T const F77_INT const F77_DBLE const F77_INT const F77_DBLE F77_DBLE F77_DBLE F77_DBLE F77_DBLEWR2
 
F77_RET_T F77_INT const F77_INT const F77_DBLE_CMPLX const F77_INT const F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLXxVL
 
F77_RET_T F77_INT const F77_INT const F77_DBLE_CMPLX const F77_INT const F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLXxVR
 
F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLEZ
 

Typedef Documentation

◆ complex_selector

F77_RET_T complex_selector

Definition at line 358 of file lo-lapack-proto.h.

◆ double_selector

F77_RET_T double_selector

Definition at line 356 of file lo-lapack-proto.h.

◆ float_complex_selector

F77_RET_T float_complex_selector

Definition at line 359 of file lo-lapack-proto.h.

◆ float_selector

F77_RET_T float_selector

Definition at line 357 of file lo-lapack-proto.h.

Function Documentation

◆ F77_FUNC() [1/169]

F77_RET_T F77_FUNC ( dgbcon  ,
DGBCON   
)

◆ F77_FUNC() [2/169]

F77_RET_T F77_FUNC ( zgbcon  ,
ZGBCON   
)

◆ F77_FUNC() [3/169]

F77_RET_T F77_FUNC ( dgbtrf  ,
DGBTRF   
) const &

◆ F77_FUNC() [4/169]

F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE const F77_INT F77_INT F77_INT& F77_RET_T F77_FUNC ( zgbtrf  ,
ZGBTRF   
) const &

◆ F77_FUNC() [5/169]

F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_INT& F77_RET_T F77_FUNC ( dgbtrs  ,
DGBTRS   
)

◆ F77_FUNC() [6/169]

F77_RET_T F77_FUNC ( zgbtrs  ,
ZGBTRS   
)

◆ F77_FUNC() [7/169]

F77_RET_T F77_FUNC ( cgebal  ,
CGEBAL   
)

◆ F77_FUNC() [8/169]

F77_RET_T F77_FUNC ( dgebal  ,
DGEBAL   
)

◆ F77_FUNC() [9/169]

F77_RET_T F77_FUNC ( sgebal  ,
SGEBAL   
)

◆ F77_FUNC() [10/169]

F77_RET_T F77_FUNC ( zgebal  ,
ZGEBAL   
)

◆ F77_FUNC() [11/169]

F77_RET_T F77_FUNC ( cgebak  ,
CGEBAK   
)

◆ F77_FUNC() [12/169]

F77_RET_T F77_FUNC ( dgebak  ,
DGEBAK   
)

◆ F77_FUNC() [13/169]

F77_RET_T F77_FUNC ( sgebak  ,
SGEBAK   
)

◆ F77_FUNC() [14/169]

F77_RET_T F77_FUNC ( zgebak  ,
ZGEBAK   
)

◆ F77_FUNC() [15/169]

F77_RET_T F77_FUNC ( cgecon  ,
CGECON   
)

◆ F77_FUNC() [16/169]

F77_RET_T F77_FUNC ( dgecon  ,
DGECON   
)

◆ F77_FUNC() [17/169]

F77_RET_T F77_FUNC ( sgecon  ,
SGECON   
)

◆ F77_FUNC() [18/169]

F77_RET_T F77_FUNC ( zgecon  ,
ZGECON   
)

◆ F77_FUNC() [19/169]

F77_RET_T F77_FUNC ( cgehrd  ,
CGEHRD   
) const &

◆ F77_FUNC() [20/169]

F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT& F77_RET_T F77_FUNC ( dgehrd  ,
DGEHRD   
) const &

◆ F77_FUNC() [21/169]

F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT& F77_RET_T F77_FUNC ( sgehrd  ,
SGEHRD   
) const &

◆ F77_FUNC() [22/169]

F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL const F77_INT F77_INT& F77_RET_T F77_FUNC ( zgehrd  ,
ZGEHRD   
) const &

◆ F77_FUNC() [23/169]

◆ F77_FUNC() [24/169]

◆ F77_FUNC() [25/169]

◆ F77_FUNC() [26/169]

◆ F77_FUNC() [27/169]

◆ F77_FUNC() [28/169]

◆ F77_FUNC() [29/169]

◆ F77_FUNC() [30/169]

◆ F77_FUNC() [31/169]

◆ F77_FUNC() [32/169]

F77_RET_T F77_FUNC ( dgesdd  ,
DGESDD   
)

◆ F77_FUNC() [33/169]

F77_RET_T F77_FUNC ( sgesdd  ,
SGESDD   
)

◆ F77_FUNC() [34/169]

F77_RET_T F77_FUNC ( zgesdd  ,
ZGESDD   
)

◆ F77_FUNC() [35/169]

F77_RET_T F77_FUNC ( cgesvd  ,
CGESVD   
)

◆ F77_FUNC() [36/169]

F77_RET_T F77_FUNC ( dgesvd  ,
DGESVD   
)

◆ F77_FUNC() [37/169]

F77_RET_T F77_FUNC ( sgesvd  ,
SGESVD   
)

◆ F77_FUNC() [38/169]

F77_RET_T F77_FUNC ( zgesvd  ,
ZGESVD   
)

◆ F77_FUNC() [39/169]

F77_RET_T F77_FUNC ( cgeesx  ,
CGEESX   
)

◆ F77_FUNC() [40/169]

F77_RET_T F77_FUNC ( dgeesx  ,
DGEESX   
)

◆ F77_FUNC() [41/169]

F77_RET_T F77_FUNC ( sgeesx  ,
SGEESX   
)

◆ F77_FUNC() [42/169]

F77_RET_T F77_FUNC ( zgeesx  ,
ZGEESX   
)

◆ F77_FUNC() [43/169]

F77_RET_T F77_FUNC ( cgeevx  ,
CGEEVX   
)

◆ F77_FUNC() [44/169]

F77_RET_T F77_FUNC ( dgeevx  ,
DGEEVX   
)

◆ F77_FUNC() [45/169]

F77_RET_T F77_FUNC ( sgeevx  ,
SGEEVX   
)

◆ F77_FUNC() [46/169]

F77_RET_T F77_FUNC ( zgeevx  ,
ZGEEVX   
)

◆ F77_FUNC() [47/169]

F77_RET_T F77_FUNC ( cgelsd  ,
CGELSD   
) const &

◆ F77_FUNC() [48/169]

F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT& F77_RET_T F77_FUNC ( dgelsd  ,
DGELSD   
) const &

◆ F77_FUNC() [49/169]

◆ F77_FUNC() [50/169]

◆ F77_FUNC() [51/169]

◆ F77_FUNC() [52/169]

◆ F77_FUNC() [53/169]

◆ F77_FUNC() [54/169]

◆ F77_FUNC() [55/169]

◆ F77_FUNC() [56/169]

◆ F77_FUNC() [57/169]

◆ F77_FUNC() [58/169]

◆ F77_FUNC() [59/169]

F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT& F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_INT& F77_RET_T F77_FUNC ( cgetri  ,
CGETRI   
) const &

◆ F77_FUNC() [60/169]

F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT& F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_INT& F77_RET_T F77_CMPLX const F77_INT const F77_INT F77_CMPLX const F77_INT F77_INT& F77_RET_T F77_FUNC ( dgetri  ,
DGETRI   
) const &

◆ F77_FUNC() [61/169]

F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT& F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_INT& F77_RET_T F77_CMPLX const F77_INT const F77_INT F77_CMPLX const F77_INT F77_INT& F77_RET_T F77_DBLE const F77_INT const F77_INT F77_DBLE const F77_INT F77_INT& F77_RET_T F77_FUNC ( sgetri  ,
SGETRI   
) const &

◆ F77_FUNC() [62/169]

F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT& F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_INT& F77_RET_T F77_CMPLX const F77_INT const F77_INT F77_CMPLX const F77_INT F77_INT& F77_RET_T F77_DBLE const F77_INT const F77_INT F77_DBLE const F77_INT F77_INT& F77_RET_T F77_REAL const F77_INT const F77_INT F77_REAL const F77_INT F77_INT& F77_RET_T F77_FUNC ( zgetri  ,
ZGETRI   
) const &

◆ F77_FUNC() [63/169]

F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_REAL F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_REAL F77_REAL F77_INT F77_REAL const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_INT F77_REAL F77_INT F77_CMPLX const F77_INT F77_REAL F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE const F77_INT F77_DBLE const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_REAL const F77_INT F77_REAL const F77_INT F77_INT F77_REAL F77_INT F77_REAL const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_DBLE F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE F77_INT& F77_RET_T const F77_INT F77_CMPLX const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_DBLE const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_REAL const F77_INT F77_INT F77_INT& F77_RET_T const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT F77_INT& F77_RET_T F77_CMPLX const F77_INT const F77_INT F77_CMPLX const F77_INT F77_INT& F77_RET_T F77_DBLE const F77_INT const F77_INT F77_DBLE const F77_INT F77_INT& F77_RET_T F77_REAL const F77_INT const F77_INT F77_REAL const F77_INT F77_INT& F77_RET_T F77_DBLE_CMPLX const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT& F77_RET_T F77_FUNC ( cgetrs  ,
CGETRS   
)

◆ F77_FUNC() [64/169]

F77_RET_T F77_FUNC ( dgetrs  ,
DGETRS   
)

◆ F77_FUNC() [65/169]

F77_RET_T F77_FUNC ( sgetrs  ,
SGETRS   
)

◆ F77_FUNC() [66/169]

F77_RET_T F77_FUNC ( zgetrs  ,
ZGETRS   
)

◆ F77_FUNC() [67/169]

F77_RET_T F77_FUNC ( cggbal  ,
CGGBAL   
)

◆ F77_FUNC() [68/169]

F77_RET_T F77_FUNC ( dggbal  ,
DGGBAL   
)

◆ F77_FUNC() [69/169]

F77_RET_T F77_FUNC ( sggbal  ,
SGGBAL   
)

◆ F77_FUNC() [70/169]

F77_RET_T F77_FUNC ( zggbal  ,
ZGGBAL   
)

◆ F77_FUNC() [71/169]

F77_RET_T F77_FUNC ( dggbak  ,
DGGBAK   
)

◆ F77_FUNC() [72/169]

F77_RET_T F77_FUNC ( sggbak  ,
SGGBAK   
)

◆ F77_FUNC() [73/169]

F77_RET_T F77_FUNC ( zggbak  ,
ZGGBAK   
)

◆ F77_FUNC() [74/169]

F77_RET_T F77_FUNC ( cggev  ,
CGGEV   
)

◆ F77_FUNC() [75/169]

F77_RET_T F77_FUNC ( dggev  ,
DGGEV   
)

◆ F77_FUNC() [76/169]

F77_RET_T F77_FUNC ( sggev  ,
SGGEV   
)

◆ F77_FUNC() [77/169]

F77_RET_T F77_FUNC ( zggev  ,
ZGGEV   
)

◆ F77_FUNC() [78/169]

F77_RET_T F77_FUNC ( dgghrd  ,
DGGHRD   
)

◆ F77_FUNC() [79/169]

F77_RET_T F77_FUNC ( zgghrd  ,
ZGGHRD   
)

◆ F77_FUNC() [80/169]

F77_RET_T F77_FUNC ( dgtsv  ,
DGTSV   
) const &

◆ F77_FUNC() [81/169]

F77_RET_T const F77_INT F77_DBLE F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT& F77_RET_T F77_FUNC ( zgtsv  ,
ZGTSV   
) const &

◆ F77_FUNC() [82/169]

◆ F77_FUNC() [83/169]

◆ F77_FUNC() [84/169]

◆ F77_FUNC() [85/169]

F77_RET_T F77_FUNC ( zgttrs  ,
ZGTTRS   
)

◆ F77_FUNC() [86/169]

F77_RET_T F77_FUNC ( cheev  ,
CHEEV   
)

◆ F77_FUNC() [87/169]

F77_RET_T F77_FUNC ( zheev  ,
ZHEEV   
)

◆ F77_FUNC() [88/169]

F77_RET_T F77_FUNC ( chegv  ,
CHEGV   
) const &

◆ F77_FUNC() [89/169]

F77_RET_T F77_FUNC ( zhegv  ,
ZHEGV   
) const &

◆ F77_FUNC() [90/169]

F77_RET_T F77_FUNC ( cherk  ,
CHERK   
)

◆ F77_FUNC() [91/169]

F77_RET_T F77_FUNC ( zherk  ,
ZHERK   
)

◆ F77_FUNC() [92/169]

F77_RET_T F77_FUNC ( dhgeqz  ,
DHGEQZ   
)

◆ F77_FUNC() [93/169]

F77_RET_T F77_FUNC ( zhgeqz  ,
ZHGEQZ   
)

◆ F77_FUNC() [94/169]

F77_RET_T F77_FUNC ( xilaenv  ,
XILAENV   
) const &

◆ F77_FUNC() [95/169]

F77_RET_T F77_FUNC ( dlag2  ,
DLAG2   
) const

◆ F77_FUNC() [96/169]

F77_RET_T F77_FUNC ( xdlamch  ,
XDLAMCH   
)

◆ F77_FUNC() [97/169]

F77_RET_T F77_FUNC ( xclange  ,
XCLANGE   
)

◆ F77_FUNC() [98/169]

F77_RET_T F77_FUNC ( xdlange  ,
XDLANGE   
)

◆ F77_FUNC() [99/169]

F77_RET_T F77_FUNC ( xslange  ,
XSLANGE   
)

◆ F77_FUNC() [100/169]

F77_RET_T F77_FUNC ( xzlange  ,
XZLANGE   
)

◆ F77_FUNC() [101/169]

F77_RET_T F77_FUNC ( clartg  ,
CLARTG   
) const

◆ F77_FUNC() [102/169]

F77_RET_T const F77_CMPLX F77_REAL F77_CMPLX F77_CMPLX* F77_RET_T F77_FUNC ( dlartg  ,
DLARTG   
) const &

◆ F77_FUNC() [103/169]

F77_RET_T const F77_CMPLX F77_REAL F77_CMPLX F77_CMPLX* F77_RET_T const F77_DBLE F77_DBLE F77_DBLE F77_DBLE& F77_RET_T F77_FUNC ( slartg  ,
SLARTG   
) const &

◆ F77_FUNC() [104/169]

◆ F77_FUNC() [105/169]

◆ F77_FUNC() [106/169]

◆ F77_FUNC() [107/169]

◆ F77_FUNC() [108/169]

◆ F77_FUNC() [109/169]

◆ F77_FUNC() [110/169]

F77_RET_T F77_FUNC ( zpbcon  ,
ZPBCON   
)

◆ F77_FUNC() [111/169]

F77_RET_T F77_FUNC ( dpbtrf  ,
DPBTRF   
)

◆ F77_FUNC() [112/169]

F77_RET_T F77_FUNC ( zpbtrf  ,
ZPBTRF   
)

◆ F77_FUNC() [113/169]

F77_RET_T F77_FUNC ( dpbtrs  ,
DPBTRS   
)

◆ F77_FUNC() [114/169]

F77_RET_T F77_FUNC ( zpbtrs  ,
ZPBTRS   
)

◆ F77_FUNC() [115/169]

F77_RET_T F77_FUNC ( cpocon  ,
CPOCON   
)

◆ F77_FUNC() [116/169]

F77_RET_T F77_FUNC ( dpocon  ,
DPOCON   
)

◆ F77_FUNC() [117/169]

F77_RET_T F77_FUNC ( spocon  ,
SPOCON   
)

◆ F77_FUNC() [118/169]

F77_RET_T F77_FUNC ( zpocon  ,
ZPOCON   
)

◆ F77_FUNC() [119/169]

F77_RET_T F77_FUNC ( cpotrf  ,
CPOTRF   
)

◆ F77_FUNC() [120/169]

F77_RET_T F77_FUNC ( dpotrf  ,
DPOTRF   
)

◆ F77_FUNC() [121/169]

F77_RET_T F77_FUNC ( spotrf  ,
SPOTRF   
)

◆ F77_FUNC() [122/169]

F77_RET_T F77_FUNC ( zpotrf  ,
ZPOTRF   
)

◆ F77_FUNC() [123/169]

F77_RET_T F77_FUNC ( cpotri  ,
CPOTRI   
)

◆ F77_FUNC() [124/169]

F77_RET_T F77_FUNC ( dpotri  ,
DPOTRI   
)

◆ F77_FUNC() [125/169]

F77_RET_T F77_FUNC ( spotri  ,
SPOTRI   
)

◆ F77_FUNC() [126/169]

F77_RET_T F77_FUNC ( zpotri  ,
ZPOTRI   
)

◆ F77_FUNC() [127/169]

F77_RET_T F77_FUNC ( spotrs  ,
SPOTRS   
)

◆ F77_FUNC() [128/169]

F77_RET_T F77_FUNC ( cpotrs  ,
CPOTRS   
)

◆ F77_FUNC() [129/169]

F77_RET_T F77_FUNC ( dpotrs  ,
DPOTRS   
)

◆ F77_FUNC() [130/169]

F77_RET_T F77_FUNC ( zpotrs  ,
ZPOTRS   
)

◆ F77_FUNC() [131/169]

F77_RET_T F77_FUNC ( dptsv  ,
DPTSV   
) const &

◆ F77_FUNC() [132/169]

F77_RET_T const F77_INT F77_DBLE F77_DBLE F77_DBLE const F77_INT F77_INT& F77_RET_T F77_FUNC ( zptsv  ,
ZPTSV   
) const &

◆ F77_FUNC() [133/169]

◆ F77_FUNC() [134/169]

◆ F77_FUNC() [135/169]

◆ F77_FUNC() [136/169]

F77_RET_T F77_FUNC ( ssyev  ,
SSYEV   
)

◆ F77_FUNC() [137/169]

F77_RET_T F77_FUNC ( dsygv  ,
DSYGV   
) const &

◆ F77_FUNC() [138/169]

F77_RET_T F77_FUNC ( ssygv  ,
SSYGV   
) const &

◆ F77_FUNC() [139/169]

F77_RET_T F77_FUNC ( csyrk  ,
CSYRK   
)

◆ F77_FUNC() [140/169]

F77_RET_T F77_FUNC ( dsyrk  ,
DSYRK   
)

◆ F77_FUNC() [141/169]

F77_RET_T F77_FUNC ( ssyrk  ,
SSYRK   
)

◆ F77_FUNC() [142/169]

F77_RET_T F77_FUNC ( zsyrk  ,
ZSYRK   
)

◆ F77_FUNC() [143/169]

F77_RET_T F77_FUNC ( dtgevc  ,
DTGEVC   
)

◆ F77_FUNC() [144/169]

F77_RET_T F77_FUNC ( ztgevc  ,
ZTGEVC   
)

◆ F77_FUNC() [145/169]

F77_RET_T F77_FUNC ( dtgsen  ,
DTGSEN   
) const &

◆ F77_FUNC() [146/169]

F77_RET_T F77_FUNC ( ctrcon  ,
CTRCON   
)

◆ F77_FUNC() [147/169]

F77_RET_T F77_FUNC ( dtrcon  ,
DTRCON   
)

◆ F77_FUNC() [148/169]

F77_RET_T F77_FUNC ( strcon  ,
STRCON   
)

◆ F77_FUNC() [149/169]

F77_RET_T F77_FUNC ( ztrcon  ,
ZTRCON   
)

◆ F77_FUNC() [150/169]

F77_RET_T F77_FUNC ( ctrsen  ,
CTRSEN   
)

◆ F77_FUNC() [151/169]

F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_INT F77_REAL F77_REAL F77_CMPLX const F77_INT F77_INT& F77_RET_T F77_FUNC ( dtrsen  ,
DTRSEN   
)

◆ F77_FUNC() [152/169]

◆ F77_FUNC() [153/169]

◆ F77_FUNC() [154/169]

◆ F77_FUNC() [155/169]

F77_RET_T F77_FUNC ( dtrsyl  ,
DTRSYL   
)

◆ F77_FUNC() [156/169]

F77_RET_T F77_FUNC ( strsyl  ,
STRSYL   
)

◆ F77_FUNC() [157/169]

F77_RET_T F77_FUNC ( ztrsyl  ,
ZTRSYL   
)

◆ F77_FUNC() [158/169]

F77_RET_T F77_FUNC ( ctrtri  ,
CTRTRI   
)

◆ F77_FUNC() [159/169]

F77_RET_T F77_FUNC ( dtrtri  ,
DTRTRI   
)

◆ F77_FUNC() [160/169]

F77_RET_T F77_FUNC ( strtri  ,
STRTRI   
)

◆ F77_FUNC() [161/169]

F77_RET_T F77_FUNC ( ztrtri  ,
ZTRTRI   
)

◆ F77_FUNC() [162/169]

F77_RET_T F77_FUNC ( ctrtrs  ,
CTRTRS   
)

◆ F77_FUNC() [163/169]

F77_RET_T F77_FUNC ( dtrtrs  ,
DTRTRS   
)

◆ F77_FUNC() [164/169]

F77_RET_T F77_FUNC ( strtrs  ,
STRTRS   
)

◆ F77_FUNC() [165/169]

F77_RET_T F77_FUNC ( ztrtrs  ,
ZTRTRS   
)

◆ F77_FUNC() [166/169]

F77_RET_T F77_FUNC ( cunghr  ,
CUNGHR   
) const &

◆ F77_FUNC() [167/169]

F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT& F77_RET_T F77_FUNC ( zunghr  ,
ZUNGHR   
) const &

◆ F77_FUNC() [168/169]

F77_RET_T const F77_INT const F77_INT F77_CMPLX const F77_INT F77_CMPLX F77_CMPLX const F77_INT F77_INT& F77_RET_T const F77_INT const F77_INT F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX F77_DBLE_CMPLX const F77_INT F77_INT& F77_RET_T F77_FUNC ( cungqr  ,
CUNGQR   
) const &

◆ F77_FUNC() [169/169]

◆ F77_RET_T() [1/8]

F77_RET_T ( F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
const F77_INT ,
const F77_INT ,
const F77_INT ,
F77_INT ,
F77_INT ,
F77_DBLE ,
const F77_INT ,
F77_DBLE ,
const F77_INT ,
F77_DBLE ,
F77_DBLE ,
F77_DBLE ,
const F77_INT ,
F77_DBLE ,
const F77_INT ,
F77_DBLE ,
const F77_INT ,
F77_DBLE ,
F77_INT ,
F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL  F77_CHAR_ARG_LEN_DECL 
)

◆ F77_RET_T() [2/8]

F77_RET_T ( F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
const F77_INT ,
const F77_INT ,
const F77_INT ,
F77_INT ,
F77_INT ,
F77_REAL ,
const F77_INT ,
F77_REAL ,
const F77_INT ,
F77_REAL ,
F77_REAL ,
F77_REAL ,
const F77_INT ,
F77_REAL ,
const F77_INT ,
F77_REAL ,
const F77_INT ,
F77_REAL ,
F77_INT ,
F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL  F77_CHAR_ARG_LEN_DECL 
)

◆ F77_RET_T() [3/8]

F77_RET_T ( F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
const F77_INT ,
const F77_INT ,
const F77_INT ,
F77_INT ,
F77_INT ,
F77_DBLE_CMPLX ,
const F77_INT ,
F77_DBLE_CMPLX ,
const F77_INT ,
F77_DBLE ,
F77_DBLE ,
F77_DBLE_CMPLX ,
const F77_INT ,
F77_DBLE_CMPLX ,
const F77_INT ,
F77_DBLE_CMPLX ,
const F77_INT ,
F77_DBLE_CMPLX ,
F77_DBLE ,
F77_INT ,
F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL  F77_CHAR_ARG_LEN_DECL 
)

◆ F77_RET_T() [4/8]

F77_RET_T ( F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
const F77_INT ,
const F77_INT ,
const F77_INT ,
F77_INT ,
F77_INT ,
F77_CMPLX ,
const F77_INT ,
F77_CMPLX ,
const F77_INT ,
F77_REAL ,
F77_REAL ,
F77_CMPLX ,
const F77_INT ,
F77_CMPLX ,
const F77_INT ,
F77_CMPLX ,
const F77_INT ,
F77_CMPLX ,
F77_REAL ,
F77_INT ,
F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL  F77_CHAR_ARG_LEN_DECL 
)

◆ F77_RET_T() [5/8]

F77_RET_T ( F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
const F77_INT ,
const F77_INT ,
const F77_INT ,
F77_INT ,
F77_INT ,
F77_DBLE ,
const F77_INT ,
F77_DBLE ,
const F77_INT ,
F77_DBLE ,
F77_DBLE ,
F77_DBLE ,
const F77_INT ,
F77_DBLE ,
const F77_INT ,
F77_DBLE ,
const F77_INT ,
F77_DBLE ,
const F77_INT ,
F77_INT ,
F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL  F77_CHAR_ARG_LEN_DECL 
)

◆ F77_RET_T() [6/8]

F77_RET_T ( F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
const F77_INT ,
const F77_INT ,
const F77_INT ,
F77_INT ,
F77_INT ,
F77_REAL ,
const F77_INT ,
F77_REAL ,
const F77_INT ,
F77_REAL ,
F77_REAL ,
F77_REAL ,
const F77_INT ,
F77_REAL ,
const F77_INT ,
F77_REAL ,
const F77_INT ,
F77_REAL ,
const F77_INT ,
F77_INT ,
F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL  F77_CHAR_ARG_LEN_DECL 
)

◆ F77_RET_T() [7/8]

F77_RET_T ( F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
const F77_INT ,
const F77_INT ,
const F77_INT ,
F77_INT ,
F77_INT ,
F77_DBLE_CMPLX ,
const F77_INT ,
F77_DBLE_CMPLX ,
const F77_INT ,
F77_DBLE ,
F77_DBLE ,
F77_DBLE_CMPLX ,
const F77_INT ,
F77_DBLE_CMPLX ,
const F77_INT ,
F77_DBLE_CMPLX ,
const F77_INT ,
F77_DBLE_CMPLX ,
const F77_INT ,
F77_DBLE ,
F77_INT ,
F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL  F77_CHAR_ARG_LEN_DECL 
)

◆ F77_RET_T() [8/8]

F77_RET_T ( F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
F77_CONST_CHAR_ARG_DECL  ,
const F77_INT ,
const F77_INT ,
const F77_INT ,
F77_INT ,
F77_INT ,
F77_CMPLX ,
const F77_INT ,
F77_CMPLX ,
const F77_INT ,
F77_REAL ,
F77_REAL ,
F77_CMPLX ,
const F77_INT ,
F77_CMPLX ,
const F77_INT ,
F77_CMPLX ,
const F77_INT ,
F77_CMPLX ,
const F77_INT ,
F77_REAL ,
F77_INT ,
F77_INT &F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL  F77_CHAR_ARG_LEN_DECL 
)

Variable Documentation

◆ A

◆ ALPHA

Definition at line 1187 of file lo-lapack-proto.h.

◆ ALPHAI

Definition at line 1169 of file lo-lapack-proto.h.

◆ ALPHAR

Definition at line 1169 of file lo-lapack-proto.h.

◆ B

◆ BETA

Definition at line 1169 of file lo-lapack-proto.h.

◆ CQ

◆ CWORK

◆ CZ

◆ DIF

◆ F77_CHAR_ARG_LEN_DECL

F77_RET_T const F77_INT const F77_INT const F77_DBLE_CMPLX const F77_INT F77_DBLE_CMPLX const F77_INT F77_INT& F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL F77_CHAR_ARG_LEN_DECL

Definition at line 37 of file lo-lapack-proto.h.

◆ F77_CONST_CHAR_ARG_DECL

F77_RET_T F77_CONST_CHAR_ARG_DECL

Definition at line 121 of file lo-lapack-proto.h.

◆ IHI

F77_RET_T const F77_INT const F77_INT const F77_INT & IHI

Definition at line 652 of file lo-lapack-proto.h.

◆ ILO

F77_RET_T const F77_INT const F77_INT & ILO

Definition at line 652 of file lo-lapack-proto.h.

◆ INFO